Generally, an image sensor is a semiconductor device that converts an optical image to an electric signal. A charge coupled device (CCD) is an image sensor which includes a plurality of MOS (Metal-Oxide-Silicon) capacitors in the vicinity of each other. Charge carriers are stored in the capacitors and transferred.
A CMOS image sensor employs CMOS technology which may integrate a control circuit and a signal processing circuit as peripheral circuits on the sensor chip. The CMOS image sensor includes a number of MOS transistors matching the number of pixels. A CMOS sensor may employ a switching system for sequentially detecting outputs using the MOS transistors.
An image sensor has a photo-sensing section for generating and accumulating charges liberated by the photoelectric effect by incoming light. A color filter is arranged on the photo-sensing section. A color filter array (CFA) may include red, green, and blue, or yellow, magenta, and cyan. The image sensor may include a photo-sensing section for sensing light and a logic circuit section for processing the sensed light as electrical signals used to represent image data.
To increase photosensitivity, efforts have been made to increase a fill factor of the photo-sensing section over the whole image sensor device. Because of the logic circuit section, the efforts are restricted by the limited area. To increase photosensitivity by another method, a light-condensing technology for concentrating incident light on the photosensing section has been introduced. For this purpose, a microlens is formed over a color filter of an image sensor.
FIG. 1 is a diagram of an equivalent circuit of a unit pixel (indicated by a dotted line) in a CMOS image sensor according to a related art. Referring to FIG. 1, a unit pixel of a CMOS image sensor includes of a photodiode PD and four NMOS transistors Tx, Rx, Sx, and Dx. Transfer transistor Tx is for transferring charges collected by the photodiode PD to a floating diffusion area FD. Reset transistor Rx is for resetting the floating diffusion area FD by setting a potential of a node to a specific value and draining charges Cpd. Drive transistor Dx plays a role as a source-follower buffer amplifier. A select transistor Sx enables switched addressing. The transfer and reset transistors Tx and Rx are native NMOS transistors, while the drive and select transistors Dx and Sx are normal NMOS transistors. The reset transistor Rx is provided for CDS (correlated double sampling).
The unit pixel of the CMOS image sensor, as shown in FIG. 1, senses light in a visible wavelength band in the photodiode area PD using the native transistors, and then outputs the sensed photo-generated charge. This corresponds to the quantity of charge delivered to the floating diffusion area FD, i.e., the electrical signal at the gate of the drive transistor Dx, from an output terminal Vout.
FIG. 2A and FIG. 2B are cross-sectional diagrams of a method of fabricating a CMOS image sensor according to a related art. A photodiode and a transfer transistor Tx for transferring photogenerated charges from the photodiode (PD) to a floating diffusion area (FD) are shown. A method of fabricating an image sensor according to a related art is briefly explained with reference to the drawings as follows.
Referring to FIG. 2A, a p-epitaxial layer (not shown in the drawing) lightly doped with p type impurities, a field oxide layer (not shown in the drawing) for isolation between unit pixels, and a photodiode area 210 are formed over a p+substrate 200 heavily doped with p type impurities by LOCOS (local oxidation of silicon) and ion implantation. A gate electrode 220 of a transfer transistor Tx is formed over the p-epitaxial layer. Gates (not shown in the drawing) of drive, reset, and select transistors Dx, Rx, and Sx can be simultaneously formed. To form a spacer attached to one sidewall of the gate electrode 220 of the transfer transistor, an insulating layer for a spacer, e.g., an ONO (oxide/nitride/oxide) layer 230/240/250 is deposited over the substrate. After a photoresist layer has been formed over the ONO layer 230/240/250, the photoresist layer is etched to form pattern 260 to protect the photodiode area 210.
Referring to FIG. 2B, an RIE (reactive ion etch) is carried out on the ONO layer 230/240/250 using the photoresist pattern 260 as a mask. A spacer 270 attached to one sidewall of the gate electrode 220 of the transfer transistor is formed by the RIE. However, since selectivity of the photoresist for the RIE to form the spacer 270, as shown in FIG. 2B, is not high, most of the photoresist pattern formed to protect the photodiode area 210 is etched away. The oxide layer 250 beneath the photoresist pattern 260 is also etched in part.
Where the spacer 270 attached to one sidewall of the gate electrode 220 of the transfer transistor is formed by an RIE on the ONO layer in the related art image sensor having the photodiode area 210, the photodiode area, as shown in FIG. 2C, is over-etched, exposing the photodiode. This causes a damage (A) to the image sensor, shown in FIG. 2C, which may degrade performance of the image sensor.